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LM13700/LM13700a dual operational transconductance amplifiers with linearizing diodes and buffers general description the LM13700 series consists of two current controlled transconductance amplifiers, each with differential inputs and a push-pull output. the two amplifiers share common supplies but otherwise operate independently. linearizing di- odes are provided at the inputs to reduce distortion and allow higher input levels. the result is a 10 db signal-to-noise im- provement referenced to 0.5 percent thd. high impedance buffers are provided which are especially designed to complement the dynamic range of the amplifiers. the output buffers of the LM13700 differ from those of the lm13600 in that their input bias currents (and hence their output dc lev- els) are independent of i abc . this may result in performance superior to that of the lm13600 in audio applications. features n g m adjustable over 6 decades n excellent g m linearity n excellent matching between amplifiers n linearizing diodes n high impedance buffers n high output signal-to-noise ratio applications n current-controlled amplifiers n current-controlled impedances n current-controlled filters n current-controlled oscillators n multiplexers n timers n sample-and-hold circuits connection diagram dual-in-line and small outline packages ds007981-2 top view order number LM13700m, LM13700n or LM13700an see ns package number m16a or n16a may 1998 LM13700/LM13700a dual operational transconductance amplifiers with linearizing diodes and buffers ? 1999 national semiconductor corporation ds007981 www.national.com
absolute maximum ratings (note 1) if military/aerospace specified devices are required, please contact the national semiconductor sales office/ distributors for availability and specifications. supply voltage (note 2) LM13700 36 v dc or 18v LM13700a 44 v dc or 22v power dissipation (note 3) t a = 25c LM13700n, LM13700an 570 mw differential input voltage 5v diode bias current (i d )2ma amplifier bias current (i abc )2ma output short circuit duration continuous buffer output current (note 4) 20 ma operating temperature range LM13700n, LM13700an 0c to +70c dc input voltage +v s to ?v s storage temperature range ?65c to +150c soldering information dual-in-line package soldering (10 sec.) 260c small outline package vapor phase (60 sec.) 215c infrared (15 sec.) 220c see an-450 asurface mounting methods and their effect on product reliabilityo for other methods of soldering surface mount devices. electrical characteristics (note 5) parameter conditions LM13700 LM13700a units min typ max min typ max input offset voltage (v os ) 0.4 4 0.4 1 over specified temperature range 2 mv i abc = 5 a 0.3 4 0.3 1 v os including diodes diode bias current (i d ) = 500 a 0.5 5 0.5 2 mv input offset change 5 a i abc 500 a 0.1 3 0.1 1 mv input offset current 0.1 0.6 0.1 0.6 a input bias current over specified temperature range 0.4 5 0.4 5 a 18 17 forward 6700 9600 13000 7700 9600 12000 mho transconductance (g m ) over specified temperature range 5400 4000 g m tracking 0.3 0.3 db peak output current r l = 0, i abc = 5a 5 3 5 7 r l = 0, i abc = 500 a 350 500 650 350 500 650 a r l = 0, over specified temp range 300 300 peak output voltage positive r l = ,5a i abc 500 a +12 +14.2 +12 +14.2 v negative r l = ,5a i abc 500 a ?12 ?14.4 ?12 ?14.4 v supply current i abc = 500 a, both channels 2.6 2.6 ma v os sensitivity positive d v os / d v + 20 150 20 150 v/v negative d v os / d v ? 20 150 20 150 v/v cmrr 80 110 80 110 db common mode range 12 13.5 12 13.5 v crosstalk referred to input (note 6) 100 100 db 20 hz < f < 20 khz differential input current i abc = 0, input = 4v 0.02 100 0.02 10 na leakage current i abc = 0 (refer to test circuit) 0.2 100 0.2 5 na input resistance 10 26 10 26 k w open loop bandwidth 2 2 mhz slew rate unity gain compensated 50 50 v/s buffer input current (note 6) 0.5 2 0.5 2 a peak buffer output voltage (note 6) 10 10 v note 1: aabsolute maximum ratingso indicate limits beyond which damage to the device may occur. operating ratings indicate conditions for which the device i s functional, but do not guarantee specific performance limits. note 2: for selections to a supply voltage above 22v, contact factory. www.national.com 2
electrical characteristics (note 5) (continued) note 3: for operation at ambient temperatures above 25c, the device must be derated based on a 150c maximum junction temperature and a thermal resistance, junction to ambient, as follows: LM13700n, 90c/w; LM13700m, 110c/w. note 4: buffer output current should be limited so as to not exceed package dissipation. note 5: these specifications apply for v s = 15v, t a = 25c, amplifier bias current (i abc ) = 500 a, pins 2 and 15 open unless otherwise specified. the inputs to the buffers are grounded and outputs are open. note 6: these specifications apply for v s = 15v, i abc = 500 a, r out = 5k w connected from the buffer output to ?v s and the input of the buffer is connected to the transconductance amplifier output. schematic diagram typical performance characteristics one operational transconductance amplifier ds007981-1 input offset voltage ds007981-38 input offset current ds007981-39 input bias current ds007981-40 www.national.com 3
typical performance characteristics (continued) peak output current ds007981-41 peak output voltage and common mode range ds007981-42 leakage current ds007981-43 input leakage ds007981-44 transconductance ds007981-45 input resistance ds007981-46 amplifier bias voltage vs amplifier bias current ds007981-47 input and output capacitance ds007981-48 output resistance ds007981-49 www.national.com 4
typical performance characteristics (continued) circuit description the differential transistor pair q 4 and q 5 form a transcon- ductance stage in that the ratio of their collector currents is defined by the differential input voltage according to the transfer function: (1) where v in is the differential input voltage, kt/q is approxi- mately 26 mv at 25c and i 5 and i 4 are the collector currents of transistors q 5 and q 4 respectively. with the exception of distortion vs differential input voltage ds007981-50 voltage vs amplifier bias current ds007981-51 output noise vs frequency ds007981-52 unity gain follower ds007981-5 leakage current test circuit ds007981-6 differential input current test circuit ds007981-7 www.national.com 5
circuit description (continued) q 3 and q 13 , all transistors and diodes are identical in size. transistors q 1 and q 2 with diode d 1 form a current mirror which forces the sum of currents i 4 and i 5 to equal i abc : i 4 +i 5 = i abc (2) where i abc is the amplifier bias current applied to the gain pin. for small differential input voltages the ratio of i 4 and i 5 ap- proaches unity and the taylor series of the in function can be approximated as: (3) (4) collector currents i 4 and i 5 are not very useful by themselves and it is necessary to subtract one current from the other. the remaining transistors and diodes form three current mir- rors that produce an output current equal to i 5 minus i 4 thus: (5) the term in brackets is then the transconductance of the am- plifier and is proportional to i abc . linearizing diodes for differential voltages greater than a few millivolts, equa- tion (3) becomes less valid and the transconductance be- comes increasingly nonlinear. figure 1 demonstrates how the internal diodes can linearize the transfer function of the amplifier. for convenience assume the diodes are biased with current sources and the input signal is in the form of cur- rent i s . since the sum of i 4 and i 5 is i abc and the difference is i out , currents i 4 and i 5 can be written as follows: since the diodes and the input transistors have identical ge- ometries and are subject to similar voltages and tempera- tures, the following is true: (6) notice that in deriving equation (6) no approximations have been made and there are no temperature-dependent terms. the limitations are that the signal current not exceed i d /2 and that the diodes be biased with currents. in practice, re- placing the current sources with resistors will generate insig- nificant errors. applications: voltage controlled amplifiers figure 2 shows how the linearizing diodes can be used in a voltage-controlled amplifier. to understand the input biasing, it is best to consider the 13 k w resistor as a current source and use a thevenin equivalent circuit as shown in figure 3 . this circuit is similar to figure 1 and operates the same. the potentiometer in figure 2 is adjusted to minimize the effects of the control signal at the output. for optimum signal-to-noise performance, i abc should be as large as possible as shown by the output voltage vs. ampli- fier bias current graph. larger amplitudes of input signal also improve the s/n ratio. the linearizing diodes help here by allowing larger input signals for the same output distortion as shown by the distortion vs. differential input voltage graph. s/n may be optimized by adjusting the magnitude of the input signal via r in ( figure 2 ) until the output distortion is below some desired level. the output voltage swing can then be set at any level by selecting r l . although the noise contribution of the linearizing diodes is negligible relative to the contribution of the amplifier's inter- nal transistors, i d should be as large as possible. this mini- mizes the dynamic junction resistance of the diodes (r e ) and ds007981-8 figure 1. linearizing diodes www.national.com 6
applications: voltage controlled amplifiers (continued) maximizes their linearizing action when balanced against r in . a value of 1 ma is recommended for i d unless the spe- cific application demands otherwise. stereo volume control the circuit of figure 4 uses the excellent matching of the two LM13700 amplifiers to provide a stereo volume control with a typical channel-to-channel gain tracking of 0.3 db. r p is provided to minimize the output offset voltage and may be replaced with two 510 w resistors in ac-coupled applications. for the component values given, amplifier gain is derived for figure 2 as being: if v c is derived from a second signal source then the circuit becomes an amplitude modulator or two-quadrant multiplier as shown in figure 5 , where: the constant term in the above equation may be cancelled by feeding i s xi d r c /2(v? + 1.4v) into i o . the circuit of fig- ure 6 adds r m to provide this current, resulting in a four-quadrant multiplier where r c is trimmed such that v o = 0v for v in2 = 0v. r m also serves as the load resistor for i o . ds007981-9 figure 2. voltage controlled amplifier ds007981-10 figure 3. equivalent vca input circuit www.national.com 7
stereo volume control (continued) ds007981-11 figure 4. stereo volume control ds007981-12 figure 5. amplitude modulator www.national.com 8
stereo volume control (continued) noting that the gain of the LM13700 amplifier of figure 3 may be controlled by varying the linearizing diode current i d as well as by varying i abc , figure 7 shows an agc amplifier using this approach. as v o reaches a high enough amplitude (3v be ) to turn on the darlington transistors and the lineariz- ing diodes, the increase in i d reduces the amplifier gain so as to hold v o at that level. voltage controlled resistors an operational transconductance amplifier (ota) may be used to implement a voltage controlled resistor as shown in figure 8 . a signal voltage applied at r x generates a v in to the LM13700 which is then multiplied by the g m of the ampli- fier to produce an output current, thus: where g m ? 19.2i abc at 25c. note that the attenuation of v o by r and r a is necessary to maintain v in within the linear range of the LM13700 input. figure 9 shows a similar vcr where the linearizing diodes are added, essentially improving the noise performance of the resistor. a floating vcr is shown in figure 10 , where each aendo of the aresistoro may be at any voltage within the output voltage range of the LM13700. ds007981-13 figure 6. four-quadrant multiplier ds007981-14 figure 7. agc amplifier www.national.com 9
voltage controlled resistors (continued) voltage controlled filters ota's are extremely useful for implementing voltage con- trolled filters, with the LM13700 having the advantage that the required buffers are included on the i.c. the vc lo-pass filter of figure 11 performs as a unity-gain buffer amplifier at frequencies below cut-off, with the cut-off frequency being the point at which x c /g m equals the closed-loop gain of (r/ r a ). at frequencies above cut-off the circuit provides a single rc roll-off (6 db per octave) of the input signal amplitude with a ?3 db point defined by the given equation, where g m is again 19.2 x i abc at room temperature. figure 12 shows a vc high-pass filter which operates in much the same man- ner, providing a single rc roll-off below the defined cut-off frequency. additional amplifiers may be used to implement higher order filters as demonstrated by the two-pole butterworth lo-pass filter of figure 13 and the state variable filter of figure 14 . due to the excellent g m tracking of the two amplifiers, these filters perform well over several decades of frequency. ds007981-15 figure 8. voltage controlled resistor, single-ended ds007981-16 figure 9. voltage controlled resistor with linearizing diodes www.national.com 10
voltage controlled filters (continued) ds007981-17 figure 10. floating voltage controlled resistor ds007981-18 figure 11. voltage controlled low-pass filter www.national.com 11
voltage controlled filters (continued) ds007981-19 figure 12. voltage controlled hi-pass filter ds007981-20 figure 13. voltage controlled 2-pole butterworth lo-pass filter www.national.com 12
voltage controlled filters (continued) voltage controlled oscillators the classic triangular/square wave vco of figure 15 is one of a variety of voltage controlled oscillators which may be built utilizing the LM13700. with the component values shown, this oscillator provides signals from 200 khz to below 2hzasi c is varied from 1 ma to 10 na. the output ampli- tudes are set by i a xr a . note that the peak differential input voltage must be less than 5v to prevent zenering the inputs. a few modifications to this circuit produce the ramp/pulse vco of figure 16 . when v o2 is high, i f is added to i c to in- crease amplifier a1's bias current and thus to increase the charging rate of capacitor c. when v o2 is low, i f goes to zero and the capacitor discharge current is set by i c . the vc lo-pass filter of figure 11 may be used to produce a high-quality sinusoidal vco. the circuit of figure 16 em- ploys two LM13700 packages, with three of the amplifiers configured as lo-pass filters and the fourth as a limiter/ inverter. the circuit oscillates at the frequency at which the loop phase-shift is 360 or 180 for the inverter and 60 per filter stage. this vco operates from 5 hz to 50 khz with less than 1 % thd. ds007981-21 figure 14. voltage controlled state variable filter www.national.com 13
voltage controlled oscillators (continued) ds007981-22 figure 15. triangular/square-wave vco ds007981-23 figure 16. ramp/pulse vco www.national.com 14
voltage controlled oscillators (continued) additional applications figure 19 presents an interesting one-shot which draws no power supply current until it is triggered. a positive-going trig- ger pulse of at least 2v amplitude turns on the amplifier through r b and pulls the non-inverting input high. the ampli- fier regenerates and latches its output high until capacitor c charges to the voltage level on the non-inverting input. the output then switches low, turning off the amplifier and dis- charging the capacitor. the capacitor discharge rate is speeded up by shorting the diode bias pin to the inverting in- put so that an additional discharge current flows through d i when the amplifier output switches low. a special feature of this timer is that the other amplifier, when biased from v o , can perform another function and draw zero stand-by power as well. ds007981-24 figure 17. sinusoidal vco ds007981-25 figure 18 shows how to build a vco using one amplifier when the other amplifier is needed for another function. figure 18. single amplifier vco www.national.com 15
additional applications (continued) the operation of the multiplexer of figure 20 is very straight- forward. when a1 is turned on it holds v o equal to v in1 and when a2 is supplied with bias current then it controls v o .c c and r c serve to stabilize the unity-gain configuration of am- plifiers a1 and a2. the maximum clock rate is limited to about 200 khz by the LM13700 slew rate into 150 pf when the (v in1 v in2 ) differential is at its maximum allowable value of 5v. the phase-locked loop of figure 21 uses the four-quadrant multiplier of figure 6 and the vco of figure 18 to produce a pll with a 5 % hold-in range and an input sensitivity of about 300 mv. ds007981-26 figure 19. zero stand-by power timer ds007981-27 figure 20. multiplexer www.national.com 16
additional applications (continued) the schmitt trigger of figure 22 uses the amplifier output current into r to set the hysteresis of the comparator; thus v h = 2xrxi b . varying i b will produce a schmitt trigger with variable hysteresis. ds007981-28 figure 21. phase lock loop ds007981-29 figure 22. schmitt trigger www.national.com 17
additional applications (continued) figure 23 shows a tachometer or frequency-to-voltage con- verter. whenever a1 is toggled by a positive-going input, an amount of charge equal to (v h v l )c t is sourced into c f and r t . this once per cycle charge is then balanced by the cur- rent of v o /r t . the maximum f in is limited by the amount of time required to charge c t from v l to v h with a current of i b , where v l and v h represent the maximum low and maximum high output voltage swing of the LM13700. d1 is added to provide a discharge path for c t when a1 switches low. the peak detector of figure 24 uses a2 to turn on a1 when- ever v in becomes more positive than v o . a1 then charges storage capacitor c to hold v o equal to v in pk. pulling the output of a2 low through d1 serves to turn off a1 so that v o remains constant. the ramp-and-hold of figure 26 sources i b into capacitor c whenever the input to a1 is brought high, giving a ramp-rate of about 1v/ms for the component values shown. the true-rms converter of figure 27 is essentially an auto- matic gain control amplifier which adjusts its gain such that the ac power at the output of amplifier a1 is constant. the output power of amplifier a1 is monitored by squaring ampli- fier a2 and the average compared to a reference voltage with amplifier a3. the output of a3 provides bias current to the diodes of a1 to attenuate the input signal. because the output power of a1 is held constant, the rms value is con- stant and the attenuation is directly proportional to the rms value of the input voltage. the attenuation is also propor- tional to the diode bias current. amplifier a4 adjusts the ratio of currents through the diodes to be equal and therefore the voltage at the output of a4 is proportional to the rms value of the input voltage. the calibration potentiometer is set such that v o reads directly in rms volts. ds007981-30 figure 23. tachometer ds007981-31 figure 24. peak detector and hold circuit www.national.com 18
additional applications (continued) ds007981-32 figure 25. sample-hold circuit ds007981-33 figure 26. ramp and hold www.national.com 19
additional applications (continued) the circuit of figure 28 is a voltage reference of variable temperature coefficient. the 100 k w potentiometer adjusts the output voltage which has a positive tc above 1.2v, zero tc at about 1.2v, and negative tc below 1.2v. this is ac- complished by balancing the tc of the a2 transfer function against the complementary tc of d1. the wide dynamic range of the LM13700 allows easy control of the output pulse width in the pulse width modulator of fig- ure 29 . for generating i abc over a range of 4 to 6 decades of cur- rent, the system of figure 30 provides a logarithmic current out for a linear voltage in. since the closed-loop configuration ensures that the input to a2 is held equal to 0v, the output current of a1 is equal to i 3 = ?v c /r c . the differential voltage between q1 and q2 is attenuated by the r1,r2 network so that a1 may be assumed to be oper- ating within its linear range. from equation (5) , the input volt- age to a1 is: the voltage on the base of q1 is then the ratio of the q1 and q2 collector currents is defined by: combining and solving for i abc yields: this logarithmic current can be used to bias the circuit of fig- ure 4 to provide temperature independent stereo attenuation characteristic. ds007981-34 figure 27. true rms converter www.national.com 20
additional applications (continued) ds007981-35 figure 28. delta vbe reference ds007981-36 figure 29. pulse width modulator www.national.com 21
additional applications (continued) ds007981-37 figure 30. logarithmic current source www.national.com 22
physical dimensions inches (millimeters) unless otherwise noted s.o. package (m) order number LM13700m ns package number m16a molded dual-in-line package (n) order number LM13700n or LM13700an ns package number n16a www.national.com 23
notes life support policy national's products are not authorized for use as critical components in life support devices or systems without the express written approval of the president and general counsel of national semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. national semiconductor corporation americas tel: 1-800-272-9959 fax: 1-800-737-7018 email: support@nsc.com national semiconductor europe fax: +49 (0) 1 80-530 85 86 email: europe.support@nsc.com deutsch tel: +49 (0) 1 80-530 85 85 english tel: +49 (0) 1 80-532 78 32 fran?ais tel: +49 (0) 1 80-532 93 58 italiano tel: +49 (0) 1 80-534 16 80 national semiconductor asia pacific customer response group tel: 65-2544466 fax: 65-2504466 email: sea.support@nsc.com national semiconductor japan ltd. tel: 81-3-5639-7560 fax: 81-3-5639-7507 www.national.com LM13700/LM13700a dual operational transconductance amplifiers with linearizing diodes and buffers national does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and national reserves the righ t at any time without notice to change said circuitry and specifications.

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